Sample Term Paper

The use of pipeline allows a processor to work in parallel on multiple instructions at the same time. This multitasking ability allows the processor to execute instructions faster as it does not wait for the instructions to be fetched and decoded before execution. The original idea of pipelining can be traced back to 1960s when three level of instruction execution “Fetch, Decode and Execute” were suggested (Severance, 2010). However, with the passage of time a more classical approach was integrated into processors which were “Fetch, Decode, Execute, Memory Access and Register Write back”.

Later, many of the CPUs used much more complex design which included 7, 10 or even 20 step instruction pipelines while the newer processors such as Pentium 4 cores had 31 stages in their pipelines (Karbo, 2010). The use of complex pipelines allowed them to make efficient use of different types of buses, controllers and other modules simultaneously, allowing minimum idle state during the execution of instruction. However, one disadvantage of using a long pipeline is the difficulty in prediction of branching, hence, processors using branch prediction algorithms along with pipeline to predict which instructions could be executed next in order to line them up in the pipeline (Carter, 2002).

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